**A depletion MOSFET is a one state transistor, that is in an ON state even when the gate to source voltage V**_{GS}** or V**_{GSS}** is zero. The gate to source voltage can be marked in two ways depending on the manufacturer. **

The depletion MOSFET is structurally the same as an enhanced MOSFET, but the oxide layer of the gate is separated from the substrate by a thin n-type doped layer. So, unlike an enhanced MOSFET, a depletion MOSFET always has a conducting channel. Figure 1 shows the layer structure of a depletion MOSFET, and its circuit sign.

If the V_{GS} increases the resistance of the conducting layer decreases. If the V_{GSS} < 0, then the conducting layer will be depleted in the charge carriers, and the resistance will grow. When V_{GSS} < V_{T}, V_{T} is a threshold voltage that is negative in the depletion MOSFET, then all charge carriers will be repelled into the substrate.

It corresponds to the *cut**–off region*. When the V_{GSS }< V_{T}, the MOSFET is in an *ohmnic region *and acts as a variable resistor. When the drain-source voltage V_{ds} increases to the value of the gate-source voltage V_{GS}, then the device is in the *pinch-off *region, and the conducting layer becomes narrower at the drain until it is totally pinched-off. When the pinch-region is reached, the MOSFET occurs in the *saturation* region. Basically the operation of the depletion MOSFET is the same as an enhanced MOSFET, but with negative V_{T}.

Figure 2 depicts how a depletion MOSFET can be used in the circuit. When voltage at the source is 0V, voltage through the MOSFET and a resistor is 0V. When the voltage V_{GS }is 0V, there will be some current through the MOSFET. When the voltage source applies some voltage through the circuit, the V_{GS} = I_{D}R_{1}. That in turn reduces the V_{GS}

When V_{GS} is negative, the current through the MOSFET decreases. The current ${I}_{D}={I}_{\mathrm{DSS}}(1-\frac{{V}_{\mathrm{GS}}}{{V}_{T}}{)}^{2}$. Here I_{DSS} is a current through the transistor – when V_{GS} = 0, V_{T} is a gate threshold voltage of the MOSFET.

The drain-source voltage is ${V}_{\mathrm{DS}}={V}_{1}\u2013{I}_{D}({R}_{1}+{R}_{2})$ When V_{DS} is low, the MOSFET is in resistive mode of operation. When the V_{DS} is high, the MOSFET is in linear mode, where I_{D} gets saturated and does not depend on the V_{DS}, the formula for the I_{D} we stated above is valid. The condition of linear mode is ${V}_{\mathrm{DS}}>2{I}_{D}{R}_{\mathrm{DS}}$.

When the MOSFET is in linear mode, in combination with a series resistor, it can be used as a constant current source. The current in linear mode depends on the V_{GS} and the resistance R_{1}. So for the required current, the series resistance can be calculated ${R}_{1}=\frac{{V}_{T}}{{I}_{D}}(\sqrt{\frac{{I}_{D}}{{I}_{\mathrm{DSS}}}}-1)$.

What’s in the MOSFET datasheet? As an example we can consider the depletion MOSFET Infineon BSP149 with the characteristics below in Figure 3. All the symbols are also provided in the datasheet. The first table we see is the *maximum ratings*. This data is most important when you design a circuit, they are not standardised and vary from manufacturer to manufacturer.

The maximum ratings are calculated data, and not a result of an experiment or testing of the MOSFET. They are related to the circuit condition as a whole structure, it’s thermal characteristics and so on. Maximum ratings can not be exceeded in order to support the device’s normal operation during it’s life-time.

Let’s consider in detail what the consistents are of the Maximum ratings. *Drain current*, current that can pass through the MOSFET in the forward direction, I_{D}, and pulsed drain current that the MOSFET can pass in the forward direction I_{Dpulse} Some manufacturers also mention currents in reverse direction as well. The maximum continuous drain current depends on the power dissipation and is defined by the formula ${I}_{D}({T}_{C})=\sqrt{\frac{{\displaystyle \frac{{T}_{j}\u2013{T}_{C}}{{R}_{\mathrm{thJC}}}}}{{{R}_{\mathrm{DS}\left(\mathrm{on}\right)}}_{,Tj\left(\mathrm{max}\right)}}}$. The datasheet provides the graph for drain current I_{D}(T_{C}).

Above we referred to the *Power dissipation* of the device. The power dissipation graph is depicted in Figure 5 and the power dissipation ratings are also mentioned in the Maximum ratings table – there is two of them – total junction-to-case and total-junction-to-ambient power dissipation. The junction-to-case thermal resistance R_{thJC} depends on the material and dimensions. The junction-to-ambient thermal resistance R_{thJA} depends on the layout. The total power dissipation values can be obtain by the formula ${P}_{\mathrm{tot}}({T}_{C})=\frac{{T}_{j}\u2013{T}_{C}}{{R}_{\mathrm{thJC}}};{P}_{\mathrm{tot}}({T}_{A})=\frac{{T}_{J}\u2013{T}_{A}}{{R}_{\mathrm{thJA}}}$.

The *Safe operation area (SOA) *graph (Figure 6) shows the drain current as a function of drain-source voltage with different pulses lengths. This is a very important graph that describes the regions of operation of the MOSFET (we considered above) and also its limits.

Line is a limit of the maximum I_{D,pulse}. Area is limited by an on-state resistance R_{DS(on)} at the maximum junction temperature. Area , when the case temperature T_{C} is fixed, the device is limited by the constant power. Dispensing on the applied power pulse width, the maximum power loss varies according to the thermal impedance.

In Area , in linear mode operation, there is a risk of getting hot spots at low gate-source voltages due to thermal escape. This effect is very important for the latest technologies. For hot spots with high V_{DS} and long pulses SOA is described by the formula: ${I}_{D}({V}_{\mathrm{DS}})=\frac{{T}_{J}\u2013{T}_{C}}{{{V}_{{\mathrm{DS}}^{Z}}}_{\mathrm{thJC}}}$. Region shows the maximum breakdown voltage V_{BR(DSS)} that is determined by technology.

*Maximum transient thermal impedance** Z _{thJC}*. Thermal impedance consists of thermal resistance R

_{th}and thermal capacitance C

_{th}. The transient thermal impedance Z

_{thJC}takes into account the thermal resistance from the junction to the die of the case, R

_{thJC}( the power loss in the device), and heat capacity C

_{thJC}.

The maximum transient thermal impedance as a function of the loading time t_{p} (or the pulse width) is depicted in the Figure 7. This graph is depicted for different duty cycles $D=\frac{{t}_{P}}{T}$. The MOSFET device consists of several layers, and heat passes through all of them (each layer has characteristic resistance and capacitance).

The heat dissipation will depend on the thermal resistances, thermal capacitances and pulse width. The junction temperature can be obtained with the formula ${T}_{J}={T}_{J,\mathrm{start}}+\u2206{T}_{J}={T}_{J,\mathrm{start}}+{P}_{\mathrm{tot}}{Z}_{\mathrm{thJC}}$, where T_{j,start }is the T_{C}at the thermal equilibrium.

The next graph in the datasheet is *Output characteristics, *(Figure 8) which describes drain current I_{D} as a function of the drain-source voltage V_{DS} in certain conditions. This graph is depicted for the ohmic region, because MOSFETs operate optimally there.

This graph is divided into two parts – ohmic and saturated regions. The saturated region starts when ${V}_{\mathrm{DS}}={V}_{\mathrm{GS}}\u2013{V}_{\mathrm{GS}\left(\mathrm{th}\right)}$ Operation at the saturation region of the MOSFET is dangerous, because when the I_{D} increases, the V_{DS} increases gradually, which leads to the rise of conduction losses, and the MOSFET may fail. The range of V_{GS} mentioned in the datasheet determines the output characteristics in the graph.

*Drain-source on state resistance R _{DS(on)}* graphs are next in the datasheet. The drain source on state resistance R

_{DS(on)}as a function of drain current I

_{D}is calculated from the output characteristic curves, with the formula ${R}_{\mathrm{DS}\left(\mathrm{on}\right)}({I}_{D})=\frac{{V}_{\mathrm{DS}}}{{I}_{D}}$. This curve changes massively depending on the applied V

_{GS}(Figure 9).

*Drain-source on state resistance R _{DS(on)}* as a function of junction temperature T

_{j}. Figure 10 shows the typical and maximum values for the resistance, and they are determine after testing during production. The data set for R

_{DS(on)}can be calculated by the formula: ${R}_{\mathrm{DS}\left(\mathrm{on}\right)}={{R}_{\mathrm{DS}\left(\mathrm{on}\right)}}_{,25\xb0}(\mathrm{1+}\frac{\alpha}{100}{)}^{{T}_{J}-25\xb0},\alpha $ is a technology constant.

*Typical transfer characteristics* graph (Figure 11) shows the typical drain current I_{D} as a function of source-gain voltage V_{GS} at different junction temperatures. There can be more than two curves, and all them are intersecting at the point called the temperature stable operating point.

When the V_{GS} is below this point, the MOSFET is characterised by the positive temperature coefficient, then the junction temperature T_{j }growth leads to the drain current I_{D} rise. The operation with constant V_{GS} may fail the device because of thermal escape. When the V_{GS} is bigger than the operating point value, then the thermal coefficient is negative, and the rise of junction temperature T_{j} will decrease the drain current I_{D}. The MOSFET operating in this interval should be fine as soon as T_{j} is within the datasheet limits.

The datasheet shows the *Typical forward transconductance *(Figure 12), g_{fs} that is the measure of sensitivity of the drain current I_{D} to the deviation of the gate-source voltage V_{GS}. It can be obtained by the formula ${g}_{\mathrm{fs}}({I}_{D})=\frac{\u2206{I}_{D}}{\u2206{V}_{\mathrm{GS}}},\mathrm{at}{V}_{\mathrm{DS}}$.

*Gate threshold voltage** V _{thGS} * (Figure 13) shows the required gate-source voltage V

_{GS}at specific drain current I

_{D}. The threshold voltage is measured during production when V

_{GS}= V

_{DS}at a specific drain current. This data can be found in the maximum ratings table.

The Dynamic characteristics table shows the *Capacitances *for the MOSFET – input, output and reverse transfer capacitances. They are described by the formulas: ${C}_{\mathrm{ISS}}={C}_{\mathrm{GS}}+{C}_{\mathrm{GD}},{C}_{\mathrm{OSS}}={C}_{\mathrm{DS}}+{C}_{\mathrm{GD}},{C}_{\mathrm{RSS}}={C}_{\mathrm{GD}}$. Figure 14 shows input, output and reverse transfer capacitances are shown as a function V_{DS}.

Here we have considered the most important characteristics from the datasheet, describing the N-type depletion MOSFET. However, the order and the quantity of graphs and data may vary from vendor to vendor.

(Engineering Principles and Applications of Electrical Engineering, 5^{th} edition, G.Rizzoni; BSP149 datasheet, Infineon, www.infineon.com; Infineon OptiMOS MOSFET datasheet explanation, www.infineon.com)